#include <qt8s743.h>

__sfr __at (TC0PRL_ADDR)        TC0PRL;
__sfr __at (TC0PRH_ADDR)        TC0PRH;
__sfr __at (TC1PRL_ADDR)        TC1PRL;
__sfr __at (TC1PRH_ADDR)        TC1PRH;
__sfr __at (TC2PRL_ADDR)        TC2PRL;
__sfr __at (TC2PRH_ADDR)        TC2PRH;
__sfr __at (TK1CNTL_ADDR)       TK1CNTL;
__sfr __at (TK1CNTH_ADDR)       TK1CNTH;
__sfr __at (TK1CTR0_ADDR)       TK1CTR0;
__sfr __at (TK1CHSL_ADDR)       TK1CHSL;
__sfr __at (TK1CHSH_ADDR)       TK1CHSH;
__sfr __at (TK0CNTL_ADDR)       TK0CNTL;
__sfr __at (TK0CNTH_ADDR)       TK0CNTH;
__sfr __at (TK0CTR0_ADDR)       TK0CTR0;
__sfr __at (TK0CHSL_ADDR)       TK0CHSL;
__sfr __at (TK0CHSH_ADDR)       TK0CHSH;
__sfr __at (OPA1C0_ADDR)        OPA1C0;
__sfr __at (OPA1C1_ADDR)        OPA1C1;
__sfr __at (COPA1C_ADDR)        COPA1C;
__sfr __at (CMP0C0_ADDR)        CMP0C0;
__sfr __at (CMP0C1_ADDR)        CMP0C1;
__sfr __at (OPA0C0_ADDR)        OPA0C0;
__sfr __at (OPA0C1_ADDR)        OPA0C1;
__sfr __at (COPA0C_ADDR)        COPA0C;
__sfr __at (INDF0_ADDR)         INDF0;
__sfr __at (FSR0_ADDR)          FSR0;
__sfr __at (TXCR_ADDR)          TXCR;
__sfr __at (TXREG_ADDR)         TXREG;
__sfr __at (RXCR_ADDR)          RXCR;
__sfr __at (RXREG_ADDR)         RXREG;
__sfr __at (BRGDH_ADDR)         BRGDH;
__sfr __at (BRGDL_ADDR)         BRGDL;
__sfr __at (INDF1_ADDR)         INDF1;
__sfr __at (FSR1_ADDR)          FSR1;
__sfr __at (PCL_ADDR)           PCL;
__sfr __at (STATUS_ADDR)        STATUS;
__sfr __at (OPTION_ADDR)        OPTION;
__sfr __at (OSCM_ADDR)          OSCM;
__sfr __at (WDTC_ADDR)      	   WDTC;
__sfr __at (ADCON2_ADDR)        ADCON2;
__sfr __at (INDF2_ADDR)         INDF2;
__sfr __at (HBUF_ADDR)          HBUF; 
__sfr __at (INTCR2_ADDR)        INTCR2;
__sfr __at (INTF2_ADDR)         INTF2;
__sfr __at (INTCR0_ADDR)        INTCR0;
__sfr __at (INTF0_ADDR)         INTF0;
__sfr __at (INTCR1_ADDR)        INTCR1;
__sfr __at (INTF1_ADDR)         INTF1;
__sfr __at (IOA_ADDR)           IOA;
__sfr __at (OEA_ADDR)           OEA;
__sfr __at (PUA_ADDR)           PUA;
__sfr __at (PDA_ADDR)           PDA;
__sfr __at (IOB_ADDR)           IOB;
__sfr __at (OEB_ADDR)           OEB;
__sfr __at (PUB_ADDR)           PUB;
__sfr __at (PDB_ADDR)           PDB;
__sfr __at (IOC_ADDR)           IOC;
__sfr __at (OEC_ADDR)           OEC;
__sfr __at (PUC_ADDR)           PUC;
__sfr __at (PDC_ADDR)           PDC;
__sfr __at (ANSA_ADDR)          ANSA;
__sfr __at (ANSC_ADDR)          ANSC;
__sfr __at (IOBICR_ADDR)        IOBICR;
__sfr __at (IOCICR_ADDR)        IOCICR;
__sfr __at (PWM2CR_ADDR)        PWM2CR;
__sfr __at (PWM2DH_ADDR)        PWM2DH;    
__sfr __at (PWM2DL_ADDR)        PWM2DL;
__sfr __at (PWM0CR_ADDR)        PWM0CR;
__sfr __at (PWM0DH_ADDR)        PWM0DH;    
__sfr __at (PWM0DL_ADDR)        PWM0DL;
__sfr __at (PWMDEADT_ADDR)      PWMDEADT;
__sfr __at (PWM1CR_ADDR)        PWM1CR;
__sfr __at (PWM1DH_ADDR)        PWM1DH;    
__sfr __at (PWM1DL_ADDR)        PWM1DL;
__sfr __at (I2CCON_ADDR)        I2CCON;
__sfr __at (T0CR_ADDR)          T0CR;
__sfr __at (TC0CL_ADDR)         TC0CL;
__sfr __at (TC0CH_ADDR)         TC0CH;
__sfr __at (IODS_ADDR)          IODS;
__sfr __at (T1CR_ADDR)          T1CR;
__sfr __at (TC1CL_ADDR)         TC1CL;
__sfr __at (TC1CH_ADDR)         TC1CH;
__sfr __at (I2CBUF_ADDR)        I2CBUF;
__sfr __at (T2CR_ADDR)          T2CR;
__sfr __at (TC2CL_ADDR)         TC2CL;
__sfr __at (TC2CH_ADDR)         TC2CH;
__sfr __at (T2GCR_ADDR)         T2GCR;
__sfr __at (ADCON0_ADDR)        ADCON0;
__sfr __at (ADCON1_ADDR)        ADCON1;
__sfr __at (ADL_ADDR)           ADL;
__sfr __at (ADH_ADDR)           ADH;
__sfr __at (PWMS_ADDR)          PWMS;
__sfr __at (IRCCAL_ADDR)        IRCCAL;

volatile __TC0PRLbits_t __at(TC0PRL_ADDR) TC0PRLbits;
volatile __TC0PRHbits_t __at(TC0PRH_ADDR) TC0PRHbits;
volatile __TC1PRLbits_t __at(TC1PRL_ADDR) TC1PRLbits;
volatile __TC1PRHbits_t __at(TC1PRH_ADDR) TC1PRHbits;
volatile __TC2PRLbits_t __at(TC2PRL_ADDR) TC2PRLbits;
volatile __TC2PRHbits_t __at(TC2PRH_ADDR) TC2PRHbits;
volatile __TK1CNTLbits_t __at(TK1CNTL_ADDR) TK1CNTLbits;
volatile __TK1CNTHbits_t __at(TK1CNTH_ADDR) TK1CNTHbits;
volatile __TK1CTR0bits_t __at(TK1CTR0_ADDR) TK1CTR0bits;
volatile __TK1CHSLbits_t __at(TK1CHSL_ADDR) TK1CHSLbits;
volatile __TK1CHSHbits_t __at(TK1CHSH_ADDR) TK1CHSHbits;
volatile __TK0CNTLbits_t __at(TK0CNTL_ADDR) TK0CNTLbits;
volatile __TK0CNTHbits_t __at(TK0CNTH_ADDR) TK0CNTHbits;
volatile __TK0CTR0bits_t __at(TK0CTR0_ADDR) TK0CTR0bits;
volatile __TK0CHSLbits_t __at(TK0CHSL_ADDR) TK0CHSLbits;
volatile __TK0CHSHbits_t __at(TK0CHSH_ADDR) TK0CHSHbits;
volatile __OPA1C0bits_t __at(OPA1C0_ADDR) OPA1C0bits;
volatile __OPA1C1bits_t __at(OPA1C1_ADDR) OPA1C1bits;
volatile __COPA1Cbits_t __at(COPA1C_ADDR) COPA1Cbits;
volatile __CMP0C0bits_t __at(CMP0C0_ADDR) CMP0C0bits;
volatile __CMP0C1bits_t __at(CMP0C1_ADDR) CMP0C1bits;
volatile __OPA0C0bits_t __at(OPA0C0_ADDR) OPA0C0bits;
volatile __OPA0C1bits_t __at(OPA0C1_ADDR) OPA0C1bits;
volatile __COPA0Cbits_t __at(COPA0C_ADDR) COPA0Cbits;
volatile __INDF0bits_t __at(INDF0_ADDR) INDF0bits;
volatile __FSR0bits_t __at(FSR0_ADDR) FSR0bits;
volatile __TXCRbits_t __at(TXCR_ADDR) TXCRbits;
volatile __TXREGbits_t __at(TXREG_ADDR) TXREGbits;
volatile __RXCRbits_t __at(RXCR_ADDR) RXCRbits;
volatile __RXREGbits_t __at(RXREG_ADDR) RXREGbits;
volatile __BRGDHbits_t __at(BRGDH_ADDR) BRGDHbits;
volatile __BRGDLbits_t __at(BRGDL_ADDR) BRGDLbits;
volatile __INDF1bits_t __at(INDF1_ADDR) INDF1bits;
volatile __FSR1bits_t __at(FSR1_ADDR) FSR1bits;
volatile __PCLbits_t __at(PCL_ADDR) PCLbits;
volatile __STATUSbits_t __at(STATUS_ADDR) STATUSbits;
volatile __OPTIONbits_t __at(OPTION_ADDR) OPTIONbits;
volatile __OSCMbits_t __at(OSCM_ADDR) OSCMbits;
volatile __WDTCbits_t __at(WDTC_ADDR) WDTCbits;
volatile __ADCON2bits_t __at(ADCON2_ADDR) ADCON2bits;
volatile __INDF2bits_t __at(INDF2_ADDR) INDF2bits;
volatile __HBUFbits_t __at(HBUF_ADDR) HBUFbits;
volatile __INTCR2bits_t __at(INTCR2_ADDR) INTCR2bits;
volatile __INTF2bits_t __at(INTF2_ADDR) INTF2bits;
volatile __INTCR0bits_t __at(INTCR0_ADDR) INTCR0bits;
volatile __INTF0bits_t __at(INTF0_ADDR) INTF0bits;
volatile __INTCR1bits_t __at(INTCR1_ADDR) INTCR1bits;
volatile __INTF1bits_t __at(INTF1_ADDR) INTF1bits;
volatile __IOAbits_t __at(IOA_ADDR) IOAbits;
volatile __OEAbits_t __at(OEA_ADDR) OEAbits;
volatile __PUAbits_t __at(PUA_ADDR) PUAbits;
volatile __PDAbits_t __at(PDA_ADDR) PDAbits;
volatile __IOBbits_t __at(IOB_ADDR) IOBbits;
volatile __OEBbits_t __at(OEB_ADDR) OEBbits;
volatile __PUBbits_t __at(PUB_ADDR) PUBbits;
volatile __PDBbits_t __at(PDB_ADDR) PDBbits;
volatile __IOCbits_t __at(IOC_ADDR) IOCbits;
volatile __OECbits_t __at(OEC_ADDR) OECbits;
volatile __PUCbits_t __at(PUC_ADDR) PUCbits;
volatile __PDCbits_t __at(PDC_ADDR) PDCbits;
volatile __ANSAbits_t __at(ANSA_ADDR) ANSAbits;
volatile __ANSCbits_t __at(ANSC_ADDR) ANSCbits;
volatile __IOBICRbits_t __at(IOBICR_ADDR) IOBICRbits;
volatile __IOCICRbits_t __at(IOCICR_ADDR) IOCICRbits;
volatile __PWM2CRbits_t __at(PWM2CR_ADDR) PWM2CRbits;
volatile __PWM2DHbits_t __at(PWM2DH_ADDR) PWM2DHbits;
volatile __PWM2DLbits_t __at(PWM2DL_ADDR) PWM2DLbits;
volatile __PWM0CRbits_t __at(PWM0CR_ADDR) PWM0CRbits;
volatile __PWM0DHbits_t __at(PWM0DH_ADDR) PWM0DHbits;
volatile __PWM0DLbits_t __at(PWM0DL_ADDR) PWM0DLbits;
volatile __PWMDEADTbits_t __at(PWMDEADT_ADDR) PWMDEADTbits;
volatile __PWM1CRbits_t __at(PWM1CR_ADDR) PWM1CRbits;
volatile __PWM1DHbits_t __at(PWM1DH_ADDR) PWM1DHbits;
volatile __PWM1DLbits_t __at(PWM1DL_ADDR) PWM1DLbits;
volatile __I2CCONbits_t __at(I2CCON_ADDR) I2CCONbits;
volatile __T0CRbits_t __at(T0CR_ADDR) T0CRbits;
volatile __TC0CLbits_t __at(TC0CL_ADDR) TC0CLbits;
volatile __TC0CHbits_t __at(TC0CH_ADDR) TC0CHbits;
volatile __IODSbits_t __at(IODS_ADDR) IODSbits;
volatile __T1CRbits_t __at(T1CR_ADDR) T1CRbits;
volatile __TC1CLbits_t __at(TC1CL_ADDR) TC1CLbits;
volatile __TC1CHbits_t __at(TC1CH_ADDR) TC1CHbits;
volatile __I2CBUFbits_t __at(I2CBUF_ADDR) I2CBUFbits;
volatile __T2CRbits_t __at(T2CR_ADDR) T2CRbits;
volatile __TC2CLbits_t __at(TC2CL_ADDR) TC2CLbits;
volatile __TC2CHbits_t __at(TC2CH_ADDR) TC2CHbits;
volatile __T2GCRbits_t __at(T2GCR_ADDR) T2GCRbits;
volatile __ADCON0bits_t __at(ADCON0_ADDR) ADCON0bits;
volatile __ADCON1bits_t __at(ADCON1_ADDR) ADCON1bits;
volatile __PWMSbits_t __at(PWMS_ADDR) PWMSbits;
volatile __IRCCALbits_t __at(IRCCAL_ADDR) IRCCALbits;
