#include <qt8s737.h>

__sfr __at (INDF0_ADDR)          INDF0;
__sfr __at (FSR0_ADDR)           FSR0;
__sfr __at (TKCTR0_ADDR)         TKCTR0;
__sfr __at (TKCTR1_ADDR)         TKCTR1;
__sfr __at (TKCNTL_ADDR)         TKCNTL;
__sfr __at (TKCNTH_ADDR)         TKCNTH;
__sfr __at (TKCHSL_ADDR)         TKCHSL;
__sfr __at (TKCHSH_ADDR)         TKCHSH;
__sfr __at (INDF1_ADDR)          INDF1;
__sfr __at (FSR1_ADDR)           FSR1;
__sfr __at (PCL_ADDR)            PCL;
__sfr __at (STATUS_ADDR)         STATUS;
__sfr __at (OPTION_ADDR)         OPTION;
__sfr __at (OSCM_ADDR)           OSCM;
__sfr __at (WDTC_ADDR)       	  WDTC;
__sfr __at (IOBICR_ADDR)         IOBICR;
__sfr __at (INDF2_ADDR)          INDF2;
__sfr __at (HBUF_ADDR)           HBUF; 
__sfr __at (PDB_ADDR)            PDB;
__sfr __at (INTCR0_ADDR)         INTCR0;
__sfr __at (INTF0_ADDR)          INTF0;
__sfr __at (INTCR1_ADDR)         INTCR1;
__sfr __at (INTF1_ADDR)          INTF1;
__sfr __at (IOA_ADDR)            IOA;
__sfr __at (OEA_ADDR)            OEA;
__sfr __at (PUA_ADDR)            PUA;
__sfr __at (ANSA_ADDR)           ANSA;
__sfr __at (IOB_ADDR)            IOB;
__sfr __at (OEB_ADDR)            OEB;
__sfr __at (PUB_ADDR)            PUB;
__sfr __at (ANSB_ADDR)           ANSB;
__sfr __at (IOC_ADDR)            IOC;
__sfr __at (OEC_ADDR)            OEC;
__sfr __at (PUC_ADDR)            PUC;
__sfr __at (ANSC_ADDR)           ANSC;
__sfr __at (IOIDS_ADDR)          IOIDS;
__sfr __at (I2CADR_ADDR)         I2CADR;
__sfr __at (I2CCON_ADDR)         I2CCON;
__sfr __at (I2CBUF_ADDR)         I2CBUF;
__sfr __at (PWM0CR_ADDR)         PWM0CR;    
__sfr __at (PWM0D_ADDR)          PWM0D;
__sfr __at (TXCR_ADDR)           TXCR;
__sfr __at (TXREG_ADDR)          TXREG;
__sfr __at (RXCR_ADDR)           RXCR;    
__sfr __at (RXREG_ADDR)          RXREG;
__sfr __at (BRGDH_ADDR)          BRGDH;
__sfr __at (BRGDL_ADDR)          BRGDL;
__sfr __at (ADCON0_ADDR)         ADCON0;
__sfr __at (ADCON1_ADDR)         ADCON1;
__sfr __at (ADL_ADDR)            ADL;
__sfr __at (ADH_ADDR)            ADH;
__sfr __at (ADCON2_ADDR)         ADCON2;
__sfr __at (T1CR_ADDR)           T1CR;
__sfr __at (TC1CL_ADDR)          TC1CL;
__sfr __at (TC1CH_ADDR)          TC1CH;
__sfr __at (T0CR_ADDR)           T0CR;
__sfr __at (TC0CL_ADDR)          TC0CL;
__sfr __at (TC0CH_ADDR)          TC0CH;
__sfr __at (PWM1DEAD_ADDR)       PWM1DEAD;
__sfr __at (PWM1S_ADDR)          PWM1S;
__sfr __at (PWM1CR_ADDR)         PWM1CR;
__sfr __at (PWM1DL_ADDR)         PWM1DL;
__sfr __at (PWM1DH_ADDR)         PWM1DH;
__sfr __at (EECON1_ADDR)         EECON1;
__sfr __at (EECON2_ADDR)         EECON2;
__sfr __at (VREFCAL_ADDR)        VREFCAL;
__sfr __at (IRCCAL_ADDR)         IRCCAL;

volatile __INDF0bits_t __at(INDF0_ADDR) INDF0bits;
volatile __FSR0bits_t __at(FSR0_ADDR) FSR0bits;
volatile __TKCTR0bits_t __at(TKCTR0_ADDR) TKCTR0bits;
volatile __TKCTR1bits_t __at(TKCTR1_ADDR) TKCTR1bits;
volatile __TKCNTLbits_t __at(TKCNTL_ADDR) TKCNTLbits;
volatile __TKCNTHbits_t __at(TKCNTH_ADDR) TKCNTHbits;
volatile __TKCHSLbits_t __at(TKCHSL_ADDR) TKCHSLbits;
volatile __TKCHSHbits_t __at(TKCHSL_ADDR) TKCHSHbits;
volatile __INDF1bits_t __at(INDF1_ADDR) INDF1bits;
volatile __FSR1bits_t __at(FSR1_ADDR) FSR1bits;
volatile __PCLbits_t __at(PCL_ADDR) PCLbits;
volatile __STATUSbits_t __at(STATUS_ADDR) STATUSbits;
volatile __OPTIONbits_t __at(OPTION_ADDR) OPTIONbits;
volatile __OSCMbits_t __at(OSCM_ADDR) OSCMbits;
volatile __WDTCbits_t __at(WDTC_ADDR) WDTCbits;
volatile __IOBICRbits_t __at(IOBICR_ADDR) IOBICRbits;
volatile __INDF2bits_t __at(INDF2_ADDR) INDF2bits;
volatile __HBUFbits_t __at(HBUF_ADDR) HBUFbits;
volatile __PDBbits_t __at(PDB_ADDR) PDBbits;
volatile __INTCR0bits_t __at(INTCR0_ADDR) INTCR0bits;
volatile __INTF0bits_t __at(INTF0_ADDR) INTF0bits;
volatile __INTCR1bits_t __at(INTCR1_ADDR) INTCR1bits;
volatile __INTF1bits_t __at(INTF1_ADDR) INTF1bits;
volatile __IOAbits_t __at(IOA_ADDR) IOAbits;
volatile __OEAbits_t __at(OEA_ADDR) OEAbits;
volatile __PUAbits_t __at(PUA_ADDR) PUAbits;
volatile __ANSAbits_t __at(ANSA_ADDR) ANSAbits;
volatile __IOBbits_t __at(IOB_ADDR) IOBbits;
volatile __OEBbits_t __at(OEB_ADDR) OEBbits;
volatile __PUBbits_t __at(PUB_ADDR) PUBbits;
volatile __ANSBbits_t __at(ANSB_ADDR) ANSBbits;
volatile __IOCbits_t __at(IOC_ADDR) IOCbits;
volatile __OECbits_t __at(OEC_ADDR) OECbits;
volatile __PUCbits_t __at(PUC_ADDR) PUCbits;
volatile __ANSCbits_t __at(ANSC_ADDR) ANSCbits;
volatile __IOIDSbits_t __at(IOIDS_ADDR) IOIDSbits;
volatile __I2CADRbits_t __at(I2CADR_ADDR) I2CADRbits;
volatile __I2CCONbits_t __at(I2CCON_ADDR) I2CCONbits;
volatile __I2CBUFbits_t __at(I2CBUF_ADDR) I2CBUFbits;
volatile __PWM0CRbits_t __at(PWM0CR_ADDR) PWM0CRbits;
volatile __PWM0Dbits_t __at(PWM0D_ADDR) PWM0Dbits;
volatile __TXCRbits_t __at(TXCR_ADDR) TXCRbits;
volatile __TXREGbits_t __at(TXREG_ADDR) TXREGbits;
volatile __RXCRbits_t __at(RXCR_ADDR) RXCRbits;
volatile __RXREGbits_t __at(RXREG_ADDR) RXREGbits;
volatile __BRGDHbits_t __at(BRGDH_ADDR) BRGDHbits;
volatile __BRGDLbits_t __at(BRGDL_ADDR) BRGDLbits;
volatile __ADCON0bits_t __at(ADCON0_ADDR) ADCON0bits;
volatile __ADCON1bits_t __at(ADCON1_ADDR) ADCON1bits;
volatile __ADCON2bits_t __at(ADCON2_ADDR) ADCON2bits;
volatile __T1CRbits_t __at(T1CR_ADDR) T1CRbits;
volatile __TC1CLbits_t __at(TC1CL_ADDR) TC1CLbits;
volatile __TC1CHbits_t __at(TC1CH_ADDR) TC1CHbits;
volatile __T0CRbits_t __at(T0CR_ADDR) T0CRbits;
volatile __TC0CLbits_t __at(TC0CL_ADDR) TC0CLbits;
volatile __TC0CHbits_t __at(TC0CH_ADDR) TC0CHbits;
volatile __PWM1DEADbits_t __at(PWM1DEAD_ADDR) PWM1DEADbits;
volatile __PWM1Sbits_t __at(PWM1S_ADDR) PWM1Sbits;
volatile __PWM1CRbits_t __at(PWM1CR_ADDR) PWM1CRbits;
volatile __PWM1DLbits_t __at(PWM1DL_ADDR) PWM1DLbits;
volatile __PWM1DHbits_t __at(PWM1DH_ADDR) PWM1DHbits;
volatile __EECON1bits_t __at(EECON1_ADDR) EECON1bits;
volatile __EECON2bits_t __at(EECON2_ADDR) EECON2bits;
volatile __VREFCALbits_t __at(VREFCAL_ADDR) VREFCALbits;
volatile __IRCCALbits_t __at(IRCCAL_ADDR) IRCCALbits;